{"id":70,"date":"2019-06-04T12:19:06","date_gmt":"2019-06-04T12:19:06","guid":{"rendered":"https:\/\/labsland.com\/blog\/es\/?p=70"},"modified":"2020-03-30T15:41:17","modified_gmt":"2020-03-30T15:41:17","slug":"proyecto-piloto-de-laboratorios-fpga-para-electronica-digital-con-upna-y-unifesp-brasil","status":"publish","type":"post","link":"https:\/\/labsland.com\/blog\/es\/2019\/06\/04\/proyecto-piloto-de-laboratorios-fpga-para-electronica-digital-con-upna-y-unifesp-brasil\/","title":{"rendered":"Proyecto piloto de laboratorios FPGA para Electr\u00f3nica Digital con UPNA (Pamplona) y UNIFESP (S\u00e3o Paulo)"},"content":{"rendered":"\n

Electr\u00f3nica Digital, FPGAs y HDLs<\/h2>\n\n\n\n

Hoy en d\u00eda, la Electr\u00f3nica Digital es una parte importante de pr\u00e1cticamente cualquier ingenier\u00eda. Entre los diferentes contenidos que se aprenden est\u00e1n los relativos a dispositivos de l\u00f3gica programada.

Uno de los tipos de dispositivos de l\u00f3gica programada m\u00e1s frecuentes y \u00fatiles son los FPGA. Est\u00e1n formados internamente (al menos de forma conceptual) por una rejilla de puertas l\u00f3gicas. Pueden ser configurados mediante lenguajes de descripci\u00f3n hardware. Son as\u00ed tremendamente vers\u00e1tiles, y al mismo tiempo extremadamente r\u00e1pidos.<\/p>\n\n\n\n

La ense\u00f1anza de lenguajes de descripci\u00f3n hardware, tales como VHDL o Verilog; y la ense\u00f1anza general de FPGA, sin embargo, conlleva bastantes retos. Las placas FPGA educativas tienden a tener un coste elevado. Al mismo tiempo, tienden a ser m\u00e1s complejas, y los lenguajes de descripci\u00f3n hardware tienden a ser menos \u00abintuitivos\u00bb que los lenguajes de programaci\u00f3n est\u00e1ndar. <\/p>\n\n\n\n

Comprobando los dise\u00f1os: proyecto piloto<\/h2>\n\n\n\n

Sin una placa FPGA educativa, existen pocas opciones para probar o emular realmente el lenguaje. Existen simuladores, pero en general proporcionan una experiencia muy diferente y mucho m\u00e1s limitada que el dispositivo real.<\/p>\n\n\n\n

LabsLand<\/a>, junto con la UPNA<\/a> (Universidad P\u00fablica de Navarra) y UNIFESP<\/a> (Universidad Federal de S\u00e3o Paulo) est\u00e1 llevando acabo un proyecto piloto para potenciar y facilitar el aprendizaje de estas tecnolog\u00edas mediante laboratorios remotos. <\/p>\n\n\n\n

La tecnolog\u00eda de los laboratorios remotos<\/h2>\n\n\n\n

Utilizando tecnolog\u00eda desarrollada por LabsLand, la UPNA y UNIFESP han desplegado un conjunto de placas FPGA educativas remotizadas en sus respectivas instalaciones. <\/p>\n\n\n\n

\"Placas
Uno de los paneles desplegados en la UPNA. Pueden observarse varias placas FPGA educativas, cada una apuntada por una webcam.<\/figcaption><\/figure>\n\n\n\n

Los estudiantes de UPNA y UNIFESP entran a trav\u00e9s de la plataforma web de LabsLand a un IDE online de VHDL o Verilog. En ese entorno, pueden dise\u00f1ar un sistema de l\u00f3gica programable. Trabajan tal y como lo har\u00edan con un entorno \u00aboffline\u00bb tradicional. Pero una vez dise\u00f1ado, pueden adem\u00e1s sintetizar esa l\u00f3gica, y enviarla a ser probada a una FPGA real.<\/p>\n\n\n\n

El sistema de LabsLand autom\u00e1ticamente dirigir\u00e1 al estudiante a una de las FPGA de la red. El estudiante podr\u00e1 ver la placa programada con su l\u00f3gica, a trav\u00e9s de una webcam en tiempo real. Podr\u00e1 incluso interactuar con la placa, pulsando switches y botones virtuales.<\/p>\n\n\n\n

\"\"
C\u00e1ndido Aramburu, encargado del proyecto en UPNA, impartiendo una clase de Sistemas Digitales, con los estudiantes utilizando la nueva tecnolog\u00eda desde el aula.<\/figcaption><\/figure>\n\n\n\n

Grandes ventajas para los estudiantes<\/h2>\n\n\n\n

De este modo, los estudiantes no s\u00f3lo pueden acceder a FPGAs de forma mucho m\u00e1s sencilla (a trav\u00e9s de una web, sin tener que desplegar cables ni moverse a laboratorios). Pueden hacerlo desde el aula normal, o desde sus casas. Y necesitan un n\u00famero mucho m\u00e1s reducido de placas, porque se comparten entre todas las universidades que participan en la red. Un estudiante de UPNA accede indistintamente a una placa de UPNA o a una placa de UNIFESP. <\/p>\n\n\n\n

El primer piloto del sistema est\u00e1 ya en marcha y se est\u00e1 llevando acabo con 80 estudiantes de la UPNA, y el curso que viene tendr\u00e1 muchos m\u00e1s.<\/p>\n\n\n\n

El proyecto piloto tambi\u00e9n ha aparecido en medios de comunicaci\u00f3n como EuropaPress<\/a>, Noticias de Navarra<\/a>, o La Vanguardia<\/a>.<\/p>\n","protected":false},"excerpt":{"rendered":"

Electr\u00f3nica Digital, FPGAs y HDLs Hoy en d\u00eda, la Electr\u00f3nica Digital es una parte importante de pr\u00e1cticamente cualquier ingenier\u00eda. Entre los diferentes contenidos que se aprenden est\u00e1n los relativos a dispositivos de l\u00f3gica programada. Uno de los tipos de dispositivos de l\u00f3gica programada m\u00e1s frecuentes y \u00fatiles son los FPGA. Est\u00e1n formados internamente (al menos […]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"ocean_post_layout":"","ocean_both_sidebars_style":"","ocean_both_sidebars_content_width":0,"ocean_both_sidebars_sidebars_width":0,"ocean_sidebar":"0","ocean_second_sidebar":"0","ocean_disable_margins":"enable","ocean_add_body_class":"","ocean_shortcode_before_top_bar":"","ocean_shortcode_after_top_bar":"","ocean_shortcode_before_header":"","ocean_shortcode_after_header":"","ocean_has_shortcode":"","ocean_shortcode_after_title":"","ocean_shortcode_before_footer_widgets":"","ocean_shortcode_after_footer_widgets":"","ocean_shortcode_before_footer_bottom":"","ocean_shortcode_after_footer_bottom":"","ocean_display_top_bar":"default","ocean_display_header":"default","ocean_header_style":"","ocean_center_header_left_menu":"0","ocean_custom_header_template":"0","ocean_custom_logo":0,"ocean_custom_retina_logo":0,"ocean_custom_logo_max_width":0,"ocean_custom_logo_tablet_max_width":0,"ocean_custom_logo_mobile_max_width":0,"ocean_custom_logo_max_height":0,"ocean_custom_logo_tablet_max_height":0,"ocean_custom_logo_mobile_max_height":0,"ocean_header_custom_menu":"0","ocean_menu_typo_font_family":"0","ocean_menu_typo_font_subset":"","ocean_menu_typo_font_size":0,"ocean_menu_typo_font_size_tablet":0,"ocean_menu_typo_font_size_mobile":0,"ocean_menu_typo_font_size_unit":"px","ocean_menu_typo_font_weight":"","ocean_menu_typo_font_weight_tablet":"","ocean_menu_typo_font_weight_mobile":"","ocean_menu_typo_transform":"","ocean_menu_typo_transform_tablet":"","ocean_menu_typo_transform_mobile":"","ocean_menu_typo_line_height":0,"ocean_menu_typo_line_height_tablet":0,"ocean_menu_typo_line_height_mobile":0,"ocean_menu_typo_line_height_unit":"","ocean_menu_typo_spacing":0,"ocean_menu_typo_spacing_tablet":0,"ocean_menu_typo_spacing_mobile":0,"ocean_menu_typo_spacing_unit":"","ocean_menu_link_color":"","ocean_menu_link_color_hover":"","ocean_menu_link_color_active":"","ocean_menu_link_background":"","ocean_menu_link_hover_background":"","ocean_menu_link_active_background":"","ocean_menu_social_links_bg":"","ocean_menu_social_hover_links_bg":"","ocean_menu_social_links_color":"","ocean_menu_social_hover_links_color":"","ocean_disable_title":"default","ocean_disable_heading":"default","ocean_post_title":"","ocean_post_subheading":"","ocean_post_title_style":"","ocean_post_title_background_color":"","ocean_post_title_background":0,"ocean_post_title_bg_image_position":"","ocean_post_title_bg_image_attachment":"","ocean_post_title_bg_image_repeat":"","ocean_post_title_bg_image_size":"","ocean_post_title_height":0,"ocean_post_title_bg_overlay":0.5,"ocean_post_title_bg_overlay_color":"","ocean_disable_breadcrumbs":"default","ocean_breadcrumbs_color":"","ocean_breadcrumbs_separator_color":"","ocean_breadcrumbs_links_color":"","ocean_breadcrumbs_links_hover_color":"","ocean_display_footer_widgets":"default","ocean_display_footer_bottom":"default","ocean_custom_footer_template":"0","footnotes":"","ocean_post_oembed":"","ocean_post_self_hosted_media":"","ocean_post_video_embed":"","ocean_link_format":"","ocean_link_format_target":"self","ocean_quote_format":"","ocean_quote_format_link":"post","ocean_gallery_link_images":"off","ocean_gallery_id":[]},"categories":[3],"tags":[5,4,9,7,6,8],"yoast_head":"\nProyecto piloto de laboratorios FPGA para Electr\u00f3nica Digital con UPNA (Pamplona) y UNIFESP (S\u00e3o Paulo) - Blog de LabsLand<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/labsland.com\/blog\/es\/2019\/06\/04\/proyecto-piloto-de-laboratorios-fpga-para-electronica-digital-con-upna-y-unifesp-brasil\/\" \/>\n<meta property=\"og:locale\" content=\"es_ES\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Proyecto piloto de laboratorios FPGA para Electr\u00f3nica Digital con UPNA (Pamplona) y UNIFESP (S\u00e3o Paulo) - Blog de LabsLand\" \/>\n<meta property=\"og:description\" content=\"Electr\u00f3nica Digital, FPGAs y HDLs Hoy en d\u00eda, la Electr\u00f3nica Digital es una parte importante de pr\u00e1cticamente cualquier ingenier\u00eda. Entre los diferentes contenidos que se aprenden est\u00e1n los relativos a dispositivos de l\u00f3gica programada. Uno de los tipos de dispositivos de l\u00f3gica programada m\u00e1s frecuentes y \u00fatiles son los FPGA. Est\u00e1n formados internamente (al menos […]\" \/>\n<meta property=\"og:url\" content=\"https:\/\/labsland.com\/blog\/es\/2019\/06\/04\/proyecto-piloto-de-laboratorios-fpga-para-electronica-digital-con-upna-y-unifesp-brasil\/\" \/>\n<meta property=\"og:site_name\" content=\"Blog de LabsLand\" \/>\n<meta property=\"article:publisher\" content=\"https:\/\/www.facebook.com\/LabsLand\/\" \/>\n<meta property=\"article:published_time\" content=\"2019-06-04T12:19:06+00:00\" \/>\n<meta property=\"article:modified_time\" content=\"2020-03-30T15:41:17+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/lh6.googleusercontent.com\/EuIK1gF9sVcHF_Mg4Foeb3QT8xv7F0oC8jucazUufgaF9kpTujefJmvJuUvV9oYl59Q3Qk8bhHTFTmY8Ckbqo1OCYBDPlPOas92PpEJNj2EuOFHUnG_DcN2YPqf1WjP6xJ7L7cwKVos\" \/>\n<meta name=\"author\" content=\"Luis\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:creator\" content=\"@labslandes\" \/>\n<meta name=\"twitter:site\" content=\"@labslandes\" \/>\n<meta name=\"twitter:label1\" content=\"Escrito por\" \/>\n\t<meta name=\"twitter:data1\" content=\"Luis\" \/>\n\t<meta name=\"twitter:label2\" content=\"Tiempo de lectura\" \/>\n\t<meta name=\"twitter:data2\" content=\"3 minutos\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\/\/schema.org\",\"@graph\":[{\"@type\":\"Article\",\"@id\":\"https:\/\/labsland.com\/blog\/es\/2019\/06\/04\/proyecto-piloto-de-laboratorios-fpga-para-electronica-digital-con-upna-y-unifesp-brasil\/#article\",\"isPartOf\":{\"@id\":\"https:\/\/labsland.com\/blog\/es\/2019\/06\/04\/proyecto-piloto-de-laboratorios-fpga-para-electronica-digital-con-upna-y-unifesp-brasil\/\"},\"author\":{\"name\":\"Luis\",\"@id\":\"https:\/\/labsland.com\/blog\/es\/#\/schema\/person\/c620efcd93e38661a9b4c9f459e04906\"},\"headline\":\"Proyecto piloto de laboratorios FPGA para Electr\u00f3nica Digital con UPNA (Pamplona) y UNIFESP (S\u00e3o Paulo)\",\"datePublished\":\"2019-06-04T12:19:06+00:00\",\"dateModified\":\"2020-03-30T15:41:17+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\/\/labsland.com\/blog\/es\/2019\/06\/04\/proyecto-piloto-de-laboratorios-fpga-para-electronica-digital-con-upna-y-unifesp-brasil\/\"},\"wordCount\":583,\"publisher\":{\"@id\":\"https:\/\/labsland.com\/blog\/es\/#organization\"},\"image\":{\"@id\":\"https:\/\/labsland.com\/blog\/es\/2019\/06\/04\/proyecto-piloto-de-laboratorios-fpga-para-electronica-digital-con-upna-y-unifesp-brasil\/#primaryimage\"},\"thumbnailUrl\":\"https:\/\/lh6.googleusercontent.com\/EuIK1gF9sVcHF_Mg4Foeb3QT8xv7F0oC8jucazUufgaF9kpTujefJmvJuUvV9oYl59Q3Qk8bhHTFTmY8Ckbqo1OCYBDPlPOas92PpEJNj2EuOFHUnG_DcN2YPqf1WjP6xJ7L7cwKVos\",\"keywords\":[\"electr\u00f3nica digital\",\"fpga\",\"hdl\",\"unifesp\",\"upna\",\"vhdl\"],\"articleSection\":[\"Labsland\"],\"inLanguage\":\"es\"},{\"@type\":\"WebPage\",\"@id\":\"https:\/\/labsland.com\/blog\/es\/2019\/06\/04\/proyecto-piloto-de-laboratorios-fpga-para-electronica-digital-con-upna-y-unifesp-brasil\/\",\"url\":\"https:\/\/labsland.com\/blog\/es\/2019\/06\/04\/proyecto-piloto-de-laboratorios-fpga-para-electronica-digital-con-upna-y-unifesp-brasil\/\",\"name\":\"Proyecto piloto de laboratorios FPGA para Electr\u00f3nica Digital con UPNA (Pamplona) y UNIFESP (S\u00e3o Paulo) - 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